1. Field of the Invention
The present invention relates to a silicon carbide (SiC) semiconductor device including a trench gate. The present invention also relates to a method of manufacturing a SiC semiconductor device.
2. Description of the Related Art
Recently, SiC has attracted attention as a material for a power device that can provide a high electric-field breakdown strength. Because a SIC semiconductor device has a high electric-field breakdown strength, the SiC semiconductor device can control a large electric current. Thus, the SiC semiconductor device is expected to be used for controlling a motor of a hybrid car.
In order to increase electric current that flows in a SiC semiconductor device, it is effective to increase a channel density. Thus, in a silicon transistor, a metal-oxide semiconductor field-effect transistor (MOSFET) having a trench gate structure is adopted and is in practical use. Although the trench gate structure can be naturally applied to a SiC semiconductor device, in a case where the trench gate structure is applied to SiC, a big problem arises. Namely, because a breakdown electric-field strength of SiC is 10 times as high as silicon, a SiC semiconductor device is used in a state where a voltage nearly 10 times as high as silicon device is applied to. Thus, electric field of 10 times as high as silicon device is applied to a gate insulating layer formed in a trench provided in SiC, and the gate insulating layer may easily break down at a corner of the trench.
JP-A-2009-194065 (corresponding to US 2009/0200559 A1) discloses a SiC semiconductor device in which a p type deep layer having a stripe pattern is disposed under a p type base region and the p type deep layer intersects with a trench that forms a trench gate structure. In the SiC semiconductor device, due to a depletion layer extending from each of the p type deep layer toward an n-type drift layer, a gate insulating layer is not easily applied with a high voltage. Thus, an electric field concentration in the gate insulating layer can be reduced, and a damage of the gate insulating layer can be reduced.
In the above-described SiC semiconductor device, when a MOSFT is activated, the p type deep layer blocks a current path and reduces a region in which electric current flows. Furthermore, because the p type deep layer has the stripe pattern and all linear sections of the p type deep layer have the same width, that is, all linear sections have the same length in a planar direction of a substrate, the p type deep layer block a large area of the current path and an on-resistance may not be reduced sufficiently.